FPGA Releases - Revision history

1BitFeverDreams: /* How to Upgrade the FPGA for the F256K2 */ μSD instead of uSD and K2 instead of F256K2

2026-05-25T13:36:16Z

How to Upgrade the FPGA for the F256K2: μSD instead of uSD and K2 instead of F256K2

Grenouye: Correct the publication date of the F256Jr2 65816 Ext Core.

2026-03-26T21:41:10Z

Correct the publication date of the F256Jr2 65816 Ext Core.

← Older revision		Revision as of 17:41, 26 March 2026
Line 34:		Line 34:
	\|-		\|-
	\|65816 Ext		\|65816 Ext
	\|[https://github.com/Mu0n/F256MiscGoodies/blob/main/fpga/Jr2/Extended/2024-12-21/F256Jr2_Ext16_Dec21st_2024.mcs 21-Dec-~~2025~~]		\|[https://github.com/Mu0n/F256MiscGoodies/blob/main/fpga/Jr2/Extended/2024-12-21/F256Jr2_Ext16_Dec21st_2024.mcs 21-Dec-2024]
	\|Implementation of the 256Bytes		\|Implementation of the 256Bytes
	Copy from Flash to RAM before booting.		Copy from Flash to RAM before booting.

1BitFeverDreams: /* How to Upgrade the FPGA for the F256K2 */

2026-02-01T20:29:51Z

How to Upgrade the FPGA for the F256K2

← Older revision		Revision as of 16:29, 1 February 2026
Line 274:		Line 274:
	It is possible that there will be more graceful methods in the future, but for now, the easiest is to pop off the uSD card found on the left side of the board marked "uSD Card / FPGA Load" and to replace the .bin files inside the directory of the root of that uSD card, using a modern computer.		It is possible that there will be more graceful methods in the future, but for now, the easiest is to pop off the uSD card found on the left side of the board marked "uSD Card / FPGA Load" and to replace the .bin files inside the directory of the root of that uSD card, using a modern computer.

	This will of course imply that you open up your case. [[Optional Upgrades#Opening the F256K case\|There is a guide]] on how to do so for the original F256K enclosure. ~~Perhaps the~~ F256K2 enclosure ~~will be~~ similar.		This is a video guide that covers both upgrade the FPGA cores of the K2 as well as updating the firmware once the FPGA is improved or installed for the first time:

			<youtube>pOab0ocKqac</youtube>

			This will of course imply that you open up your case. [[Optional Upgrades#Opening the F256K case\|There is a guide]] on how to do so for the original F256K enclosure. The F256K2 enclosure is similar.

	For those unfamiliar with the process of removing the uSD card from these slide-operation holders here is the process:		For those unfamiliar with the process of removing the uSD card from these slide-operation holders here is the process:

1BitFeverDreams: K2 purple core 1x and flat map core 1x

2026-01-13T09:09:03Z

K2 purple core 1x and flat map core 1x

← Older revision		Revision as of 05:09, 13 January 2026
Line 29:		Line 29:
	\|6502 MMU		\|6502 MMU
	\|Black*: [https://github.com/Mu0n/F256MiscGoodies/blob/main/fpga/K2/CNTX1/2025-02-02/CFP95600C.bin 02-Feb-2025]		\|Black*: [https://github.com/Mu0n/F256MiscGoodies/blob/main/fpga/K2/CNTX1/2025-02-02/CFP95600C.bin 02-Feb-2025]
	Purple*: n/a		Purple*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2Purple/CNTX1/CFP95600C.bin 05-Feb-2025]
	\|fix Onboard Access to a SPI Flash		\|fix Onboard Access to a SPI Flash
	LCD Splash Screen		LCD Splash Screen
Line 40:		Line 40:
	\|65816 Ext		\|65816 Ext
	\|Black*: [https://github.com/Mu0n/F256MiscGoodies/blob/main/fpga/K2/CNTX2/2025-01-07/CFP95616E.bin 07-Jan-2025]		\|Black*: [https://github.com/Mu0n/F256MiscGoodies/blob/main/fpga/K2/CNTX2/2025-01-07/CFP95616E.bin 07-Jan-2025]
	Purple*: n/a		Purple*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2Purple/CNTX2/CFP95616E.bin 06-Jan-2025]
	\|Updated access to WS6100		\|Updated access to WS6100
	UART for the VS1053B		UART for the VS1053B

1BitFeverDreams: K2 cores for the 2x are now available

2025-12-17T03:18:57Z

K2 cores for the 2x are now available

← Older revision		Revision as of 23:18, 16 December 2025
Line 54:		Line 54:
	!		!
	\|65816 Ext 2x		\|65816 Ext 2x
	\|[https://~~c256foenix~~.com/~~product~~-~~category~~/~~gen2~~-~~core/?v=5435c69ed3bc Buy Here~~]		\|Black*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2/CNTX4/F256K2x_Cores_Foenix138_BlackBoard_B3B_July27th_2025.bin 27-Jul-2025]
			Purple*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2/CNTX4/F256K2x_Cores_Foenix138_B0C_August4th_2025.bin 4-Aug-2025]
	\|2x CPU speed		\|2x CPU speed
	layer of 16 bit colored text		layer of 16 bit colored text

1BitFeverDreams: new 6809 K2 loads

2025-09-13T11:57:10Z

new 6809 K2 loads

← Older revision		Revision as of 07:57, 13 September 2025
Line 67:		Line 67:
	!		!
	\|6809		\|6809
	\|Black*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2/CNTX3/~~K2_NitrOS9_Load_BlackBoard_Aug26th~~.bin 26-~~Aug~~-2025]		\|Black*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2/CNTX3/NitrOS9_Load_BlackBoardB3B_WifiFixed_Sept4th.bin 04-Sep-2025]
	Purple*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2Purple/CNTX3/~~FNX6809_First_Release_Aug24th_PurpleBoard~~.bin 24-~~Aug~~-2025]		Purple*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2Purple/CNTX3/NitrOS9_Load_PurpleBoardB0C_WifiFixed_Sept4th.bin 04-Sep-2025]
	\|~~This is the preliminary version and only works with a PS/2 keyboard plugged in.~~		\|Wifi fix
	~~If destined for slot 3, rename the file and put in CNTX3/f256k2t9.bin~~
	\|-		\|-
	! colspan="3" \|		! colspan="3" \|
Line 159:		Line 158:
	\|-		\|-
	\|6809		\|6809
	\|~~no previous versions yet~~		\|Black*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2/CNTX3/K2_NitrOS9_Load_BlackBoard_Aug26th.bin 26-Aug-2025]
	\|		Purple*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2Purple/CNTX3/FNX6809_First_Release_Aug24th_PurpleBoard.bin 24-Aug-2025]
			\|This is the preliminary version and only works with a PS/2 keyboard plugged in.
			If destined for slot 3, rename the file and put in CNTX3/f256k2t9.bin
	\|}		\|}

1BitFeverDreams: 6809 cores for k2

2025-08-26T22:22:48Z

6809 cores for k2

← Older revision		Revision as of 18:22, 26 August 2025
Line 67:		Line 67:
	!		!
	\|6809		\|6809
	\|N/~~A yet~~		\|Black*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2/CNTX3/K2_NitrOS9_Load_BlackBoard_Aug26th.bin 26-Aug-2025]
	\|N/~~A yet~~		Purple*: [https://github.com/Mu0n/F256MiscGoodies/raw/refs/heads/main/fpga/K2Purple/CNTX3/FNX6809_First_Release_Aug24th_PurpleBoard.bin 24-Aug-2025]
			\|This is the preliminary version and only works with a PS/2 keyboard plugged in.
			If destined for slot 3, rename the file and put in CNTX3/f256k2t9.bin
	\|-		\|-
	! colspan="3" \|		! colspan="3" \|
Line 157:		Line 159:
	\|-		\|-
	\|6809		\|6809
	\|~~N/A~~ yet		\|no previous versions yet
	\|~~N/A yet~~		\|
	\|}		\|}

1BitFeverDreams: /* Core selecting DIP switches in the back */ fixed core 2 and 3, the most significant bit was on the wrong assumed side.

2025-07-29T01:44:27Z

Core selecting DIP switches in the back: fixed core 2 and 3, the most significant bit was on the wrong assumed side.

← Older revision		Revision as of 21:44, 28 July 2025
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	\|		\|
	[[File:Core1.png\|thumb]]		[[File:Core1.png\|thumb]]
			\|
			[[File:Core3.png\|thumb]]
	\|		\|
	[[File:Core2.png\|thumb]]		[[File:Core2.png\|thumb]]
	\|
	~~[[File:Core3.png\|thumb]]~~
	\|		\|
	[[File:Core4.png\|thumb]]		[[File:Core4.png\|thumb]]
	\|-		\|-
	\|0 0		\|0 0
			\|1 0
	\|0 1		\|0 1
	~~\|1 0~~
	\|1 1		\|1 1
	\|}		\|}

1BitFeverDreams: /* Core selecting DIP switches in the back */

2025-07-28T13:20:43Z

Core selecting DIP switches in the back

← Older revision		Revision as of 09:20, 28 July 2025
Line 326:		Line 326:
	\|-		\|-
	\|		\|
	~~<gallery>~~		[[File:Core1.png\|thumb]]
	~~Example~~.~~jpg~~\|~~Caption1~~
	~~</gallery>~~
	\|		\|
			[[File:Core2.png\|thumb]]
	\|		\|
			[[File:Core3.png\|thumb]]
	\|		\|
			[[File:Core4.png\|thumb]]
	\|-		\|-
	\|0 0		\|0 0

1BitFeverDreams: /* How to Upgrade the FPGA for the F256K2 */ better k2 procedure

2025-07-28T13:17:20Z

How to Upgrade the FPGA for the F256K2: better k2 procedure

← Older revision		Revision as of 09:17, 28 July 2025
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	\|+		\|+
	!Folder		!Folder
	!~~FPGA Core description~~		!Hard coded file name
			!Typical* usage
	!CPU in the FPGA		!CPU in the FPGA
	\|-		\|-
	\|CNTX1		\|CNTX1
			\|CFP95600C.bin
	\|F256 Classic mode with a memory management unit (MMU), where the CPU sees 64k at once		\|F256 Classic mode with a memory management unit (MMU), where the CPU sees 64k at once
	\|65816 acting as 6502		\|65816 acting as 6502
	\|-		\|-
	\|CNTX2		\|CNTX2
			\|CFP95616E.bin
	\|F256 Extended mode with a flat memory map all accessible at once		\|F256 Extended mode with a flat memory map all accessible at once
	\|65816		\|65816
	\|-		\|-
	\|CNTX3		\|CNTX3
	\|F256 with the 6809 core		\|f256k2t9.bin
			\|F256 with the 6809 core (planned) or 68000 core (planned)
	\|6809		\|6809
	\|-		\|-
	\|CNTX4		\|CNTX4
	\|~~??? To~~ be ~~determined later~~		\|foenix138.bin
			\|F256 with 2x CPU speed Extended mode with a flat memory map all accessible at once
			\|65816
			\|}

			====== Note* on typical usage ======
			As long as you keep the proper hard coded names tied to their folder names, you can slide any core to any slot. For example, if you want the 2x core to be in the CTNX2 folder, just rename it appropriately to CFP95616E.bin as you put it into CTNX2/.

			====== F256K2 core prep steps: ======

			# Take care of placing the bin file in the FPGA load uSD card
			# Set the core selecting DIP switches at the back of the unit. Down (towards bottom of the unit) = 0, Up (towards the upper side of the unit) = 1. See below for all possibilities.
			# Power up the unit. If this is the first time you're using that core and you've never done step 4 for it, it's normal to not have a properly booted initial software (ie superbasic or otherwise)
			# Write the firmware to the content of the flash. Each of the 4 cores have their own 512kb of reserved flash space that are selected at the same time as the core itself from the uSD FPGA load card. Once they are written to, they are set for future usages as you switch between cores and won't require further flash writes, unless you're doing updates.

			====== Core selecting DIP switches in the back ======
			{\| class="wikitable"
			\|+
			!Core 1
			!Core 2
			!Core 3
			!Core 4
			\|-
			\|
			<gallery>
			Example.jpg\|Caption1
			</gallery>
			\|
	\|		\|
			\|
			\|-
			\|0 0
			\|0 1
			\|1 0
			\|1 1
	\|}		\|}

← Older revision		Revision as of 09:36, 25 May 2026
Line 271:		Line 271:
	[https://www.intel.com/content/www/us/en/software-kit/665988/intel-quartus-prime-lite-edition-design-software-version-18-1-for-linux.html Intel Quartus Prime Lite Edition 18.1 for Linux]		[https://www.intel.com/content/www/us/en/software-kit/665988/intel-quartus-prime-lite-edition-design-software-version-18-1-for-linux.html Intel Quartus Prime Lite Edition 18.1 for Linux]

	==== How to Upgrade the FPGA for the F256K2 ====		==== How to Upgrade the FPGA for the Wildbits/K2 (F256K2) ====
	It is possible that there will be more graceful methods in the future, but for now, the easiest is to pop off the ~~uSD~~ card found on the left side of the board marked "~~uSD~~ Card / FPGA Load" and to replace the .bin files inside the directory of the root of that ~~uSD~~ card, using a modern computer.		It is possible that there will be more graceful methods in the future, but for now, the easiest is to pop off the μSD card found on the left side of the board marked "μSD Card / FPGA Load" and to replace the .bin files inside the directory of the root of that μSD card, using a modern computer.

	This is a video guide that covers both upgrade the FPGA cores of the K2 as well as updating the firmware once the FPGA is improved or installed for the first time:		This is a video guide that covers both upgrade the FPGA cores of the K2 as well as updating the firmware once the FPGA is improved or installed for the first time:
Line 278:		Line 278:
	<youtube>pOab0ocKqac</youtube>		<youtube>pOab0ocKqac</youtube>

	This will of course imply that you open up your case. [[Optional Upgrades#Opening the F256K case\|There is a guide]] on how to do so for the original F256K enclosure. The ~~F256K2~~ enclosure is similar.		This will of course imply that you open up your case. [[Optional Upgrades#Opening the F256K case\|There is a guide]] on how to do so for the original F256K enclosure. The K2 enclosure is similar.

	For those unfamiliar with the process of removing the ~~uSD~~ card from these slide-operation holders here is the process:		For those unfamiliar with the process of removing the μSD card from these slide-operation holders here is the process:

	1) very gently press down on the middle metal locking slider that goes across on top of the ~~uSD~~ card and slide it towards the left.		1) very gently press down on the middle metal locking slider that goes across on top of the μSD card and slide it towards the left.

	2) the ~~uSD~~ card and its locking slider will now open up by rotating towards the left with a hinge on the left side		2) the μSD card and its locking slider will now open up by rotating towards the left with a hinge on the left side

	Inside the root of this ~~uSD~~ card, there are four folders marked as CNTX# where # is a number from 1 to 4. Simply replace the .bin file therein to update any one given core. You may completely ignore .prm files since they do not affect the F256K2.		Inside the root of this μSD card, there are four folders marked as CNTX# where # is a number from 1 to 4. Simply replace the .bin file therein to update any one given core. You may completely ignore .prm files since they do not affect the F256K2.
	{\| class="wikitable"		{\| class="wikitable"
	\|+		\|+
Line 318:		Line 318:
	As long as you keep the proper hard coded names tied to their folder names, you can slide any core to any slot. For example, if you want the 2x core to be in the CTNX2 folder, just rename it appropriately to CFP95616E.bin as you put it into CTNX2/.		As long as you keep the proper hard coded names tied to their folder names, you can slide any core to any slot. For example, if you want the 2x core to be in the CTNX2 folder, just rename it appropriately to CFP95616E.bin as you put it into CTNX2/.

	====== ~~F256K2~~ core prep steps: ======		====== K2 core prep steps: ======

	# Take care of placing the bin file in the FPGA load ~~uSD~~ card		# Take care of placing the bin file in the FPGA load μSD card
	# Set the core selecting DIP switches at the back of the unit. Down (towards bottom of the unit) = 0, Up (towards the upper side of the unit) = 1. See below for all possibilities.		# Set the core selecting DIP switches at the back of the unit. Down (towards bottom of the unit) = 0, Up (towards the upper side of the unit) = 1. See below for all possibilities.
	# Power up the unit. If this is the first time you're using that core and you've never done step 4 for it, it's normal to not have a properly booted initial software (ie superbasic or otherwise)		# Power up the unit. If this is the first time you're using that core and you've never done step 4 for it, it's normal to not have a properly booted initial software (ie superbasic or otherwise)
	# Write the firmware to the content of the flash. Each of the 4 cores have their own 512kb of reserved flash space that are selected at the same time as the core itself from the ~~uSD~~ FPGA load card. Once they are written to, they are set for future usages as you switch between cores and won't require further flash writes, unless you're doing updates.		# Write the firmware to the content of the flash. Each of the 4 cores have their own 512kb of reserved flash space that are selected at the same time as the core itself from the μSD FPGA load card. Once they are written to, they are set for future usages as you switch between cores and won't require further flash writes, unless you're doing updates.

	====== Core selecting DIP switches in the back ======		====== Core selecting DIP switches in the back ======