Glossary - Revision history

1BitFeverDreams: various changes to add the Wildbits keyword in relevant places

2026-01-27T17:17:29Z

various changes to add the Wildbits keyword in relevant places

← Older revision		Revision as of 13:17, 27 January 2026
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	: Second-generation keyboard model with 65816, 2MB SRAM, 128MB DDR3 DRAM, Artix 7 XC7A200T FPGA, and Vicky "The Fourth" graphics.		: Second-generation keyboard model with 65816, 2MB SRAM, 128MB DDR3 DRAM, Artix 7 XC7A200T FPGA, and Vicky "The Fourth" graphics.

	; Foenix		; Foenix Retro Systems
	: Brand name for the retro computer line created by Stefany Allaire.		: Brand name for the retro computer line created by Stefany Allaire.

	; Wildbits		;Wildbits/Jr2
	: New owner of the ~~the F256~~ computer line.		: New name for the SBC formerly known as the F256Jr2. Second-generation Junior model with WDC 65C816 CPU, 2MB SRAM, Artix 7 FPGA, and TinyVicky II graphics. See [[Product_Specifications]].

			;Wildbits/K2
			: New name for the keyboard model formerly known as the F256K2. Second-generation keyboard model with 65816, 2MB SRAM, 128MB DDR3 DRAM, Artix 7 XC7A200T FPGA, and Vicky "The Fourth" graphics.

			; Wildbits Computing Company
			: New owner of the computer line formerly known as F256. Now branded as Wildbits/K2, Wildbits/Jr2

	== Processors ==		== Processors ==

	; 6502		; 6502
	: Classic 8-bit CPU from MOS Technology (1975), the foundation architecture for the F256 series.		: Classic 8-bit CPU from MOS Technology (1975), the foundation architecture for the F256/Wildbits series.

	; WDC 65C02		; WDC 65C02
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	; FNX6809		; FNX6809
	: FPGA-based implementation of the Motorola 6809 CPU that can run on F256 hardware. See [[FNX6809_Overview]].		: FPGA-based implementation of the Motorola 6809 CPU that can ran on first gen F256 hardware as an addon DIP PCB board. See [[FNX6809_Overview]].

			;6809
			: FPGA-based implementation of the Motorola 6809 CPU that can run on second gen F256/Wildbits hardware. See [[FNX6809_Overview]].

	; Emulation Mode		; Emulation Mode
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	; FPGA		; FPGA
	: Field-Programmable Gate Array; reconfigurable chip implementing the F256's custom logic, graphics, and sound.		: Field-Programmable Gate Array; reconfigurable chip implementing the F256/Wildbits's custom logic, graphics, and sound.

	; Cyclone IV (EP4CE15)		; Cyclone IV (EP4CE15)
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	; Artix 7 (XC7A35T)		; Artix 7 (XC7A35T)
	: Xilinx FPGA used in F256Jr2 (33,280 logic cells, 1,800kb BRAM).		: Xilinx FPGA used in F256Jr2 or Wildbits/Jr2 (33,280 logic cells, 1,800kb BRAM).

	; Artix 7 (XC7A200T)		; Artix 7 (XC7A200T)
	: Larger Xilinx FPGA used in F256K2 (215,360 logic cells, 13,140kb BRAM).		: Larger Xilinx FPGA used in F256K2 or Wildbits/K2 (215,360 logic cells, 13,140kb BRAM).

	; Core		; Core
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	; Context (CNTX)		; Context (CNTX)
	: On F256K2, one of four FPGA core slots (CNTX1-CNTX4) selectable via [[DIP_switches]].		: On F256K2 and Wildbits/K2, one of four FPGA core slots (CNTX1-CNTX4) selectable via [[DIP_switches]].

	; Sii9022		; Sii9022
	: HDMI encoder chip used on black K2 boards; removed in purple K2 boards where HDMI encoding moved to FPGA.		: HDMI encoder chip used on black F256K2 boards; removed in purple F256K2 and Wildbits/K2 boards where HDMI encoding moved to FPGA.

	== Graphics ==		== Graphics ==
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	; TinyVicky II		; TinyVicky II
	: Enhanced graphics subsystem in F256Jr2.		: Enhanced graphics subsystem in F256Jr2 and Wildbits/Jr2.

	; Vicky "The Fourth"		; Vicky "The Fourth"
	: Advanced graphics subsystem in F256K2.		: Advanced graphics subsystem in F256K2 and Wildbits/K2.

	; VICKY		; VICKY
	: General name for the Foenix graphics/video controller family.		: General name for the Foenix and Wildbits graphics/video controller family.

	; Bitmap		; Bitmap
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	; DDR3 DRAM		; DDR3 DRAM
	: 128MB dynamic RAM on F256K2 (support planned but not yet implemented).		: 128MB dynamic RAM on F256K2 and Wildbits/K2 (support planned but not yet implemented).

	; Flash		; Flash
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	; SID		; SID
	: Sound Interface Device; Commodore 64's famous sound chip. FPGA emulated on gen2; real chip sockets available on F256Jr.		: Sound Interface Device; Commodore 64's famous sound chip. FPGA emulated on gen2 and gen1 F256K; real chip sockets available on F256Jr.

	; PSG		; PSG
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	; OPL3 (YMF262)		; OPL3 (YMF262)
	: Yamaha FM synthesis chip. Real chip on F256K; FPGA emulated on other models. See [[Use_the_OPL3_YMF262]].		: Yamaha FM synthesis chip. Real chip on F256K; FPGA emulated on other models. Not present on the F256Jr. See [[Use_the_OPL3_YMF262]].

	; CODEC		; CODEC
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	; MicroKernel		; MicroKernel
	: Primary event-based, near real-time kernel for F256 (developed by Gadget). Supports 65c02 and 65816 in emulation mode. See [[Kernels]].		: Primary event-based, near real-time kernel for F256 and Wildbits (developed by Gadget). Supports 65c02 and 65816 in emulation mode. See [[Kernels]].

	; OpenFNXKernal		; OpenFNXKernal
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	; SuperBASIC		; SuperBASIC
	: BBC BASIC-inspired interpreter; default F256 programming environment. See [[SuperBASIC]].		: BBC BASIC-inspired interpreter; default F256 and Wildbits programming environment. See [[SuperBASIC]].

	; DOS		; DOS
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	; FoenixMgr		; FoenixMgr
	: Python scripts for uploading code, flashing firmware, and managing the F256 from a PC or Mac.		: Python scripts for uploading code, flashing firmware, and managing the F256 and Wildbits from a PC or Mac.

	; xdev		; xdev
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	; .bin		; .bin
	: FPGA core file extension used on F256K2's FPGA load SD card.		: FPGA core file extension used on F256K2's and Wildbits/K2's FPGA load SD card.

	; .uf2		; .uf2
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	; cc65		; cc65
			: C compiler and toolchain for 6502.

			;llvm-mos
	: C compiler and toolchain for 6502.		: C compiler and toolchain for 6502.

WF: /* Computer Models */

2026-01-27T15:08:03Z

Computer Models

← Older revision		Revision as of 11:08, 27 January 2026
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	; Wildbits		; Wildbits
	: ~~Alternative/associated brand name for~~ the F256 computer line.		: New owner of the the F256 computer line.

	== Processors ==		== Processors ==
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	; CODEC		; CODEC
	: Audio ~~codec~~ chip for digital audio output. See [[Use_the_CODEC]].		: Audio mixer chip for digital audio output. See [[Use_the_CODEC]].

	; SAM2695		; SAM2695
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	; MIDI		; MIDI
	: Musical Instrument Digital Interface~~; supported via~~ SAM2695 and hardware MIDI in/out ports ~~on gen2 models~~.		: Musical Instrument Digital Interface. Gen2 models support synthesizers in SAM2695 and VS1053b, and hardware MIDI in/out ports.

	== Input/Output ==		== Input/Output ==
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	* [[Getting_Started]]		* [[Getting_Started]]

	[[Category:Reference]]		[[index.php?title=Category:Reference]]
	[[Category:Documentation]]		[[index.php?title=Category:Documentation]]

Cibee: A comprehensive glossary of terms, acronyms, and concepts from the F256 ecosystem.

2026-01-27T12:34:25Z

A comprehensive glossary of terms, acronyms, and concepts from the F256 ecosystem.

New page

= Wildbits / Foenix F256 Glossary =

{{Short description|Reference guide to F256 hardware, software, and technical terminology}}

A comprehensive glossary of terms, acronyms, and concepts from the F256 ecosystem.

__TOC__

== Computer Models ==

; F256Jr
: First-generation "Junior" model featuring WDC 65C02 CPU, 512KB SRAM, Cyclone IV FPGA, and [[TinyVicky]] graphics.

; F256Jr2 (Jr.Jr.)
: Second-generation Junior model with WDC 65C816 CPU, 2MB SRAM, Artix 7 FPGA, and TinyVicky II graphics. See [[Product_Specifications]].

; F256K
: First-generation keyboard-integrated model with same specs as F256Jr plus built-in mechanical keyboard.

; F256K2
: Second-generation keyboard model with 65816, 2MB SRAM, 128MB DDR3 DRAM, Artix 7 XC7A200T FPGA, and Vicky "The Fourth" graphics.

; Foenix
: Brand name for the retro computer line created by Stefany Allaire.

; Wildbits
: Alternative/associated brand name for the F256 computer line.

== Processors ==

; 6502
: Classic 8-bit CPU from MOS Technology (1975), the foundation architecture for the F256 series.

; WDC 65C02
: Western Design Center's CMOS version of the 6502 with lower power consumption and additional instructions. Default CPU in first-gen F256 models.

; WDC 65C816 (65816)
: 16-bit upgrade to the 65C02 with 24-bit addressing (up to 16MB) and selectable 8/16-bit registers. See [[65816_Overview]].

; FNX6809
: FPGA-based implementation of the Motorola 6809 CPU that can run on F256 hardware. See [[FNX6809_Overview]].

; Emulation Mode
: Default 65816 startup mode that behaves like a 65C02 for backwards compatibility.

; Native Mode
: 65816 mode enabling 16-bit registers, movable direct page, and full 24-bit addressing.

; Rockwell Instructions
: Extended 6502 instructions (BBS, BBR, RMB, SMB) supported by 65C02 but '''NOT''' by 65816. Avoid these for 65816 compatibility.

== FPGA & Hardware ==

; FPGA
: Field-Programmable Gate Array; reconfigurable chip implementing the F256's custom logic, graphics, and sound.

; Cyclone IV (EP4CE15)
: Intel/Altera FPGA used in first-gen F256 models (15,408 logic elements, 504kb BRAM).

; Artix 7 (XC7A35T)
: Xilinx FPGA used in F256Jr2 (33,280 logic cells, 1,800kb BRAM).

; Artix 7 (XC7A200T)
: Larger Xilinx FPGA used in F256K2 (215,360 logic cells, 13,140kb BRAM).

; Core
: FPGA configuration/bitstream that defines the computer's behavior. See [[FPGA_Releases]].

; Core2x
: Enhanced FPGA core with 2× CPU speed (12MHz), 24-bit flat addressing, 64 additional sprites, and hardware line drawing.

; JTAG
: Joint Test Action Group; interface for programming the FPGA on first-gen models.

; USB Blaster
: Hardware programmer used to flash FPGA via JTAG on F256Jr and F256K.

; RP2040
: Raspberry Pi microcontroller that initializes the FPGA and uploads cores on second-gen models.

; Context (CNTX)
: On F256K2, one of four FPGA core slots (CNTX1-CNTX4) selectable via [[DIP_switches]].

; Sii9022
: HDMI encoder chip used on black K2 boards; removed in purple K2 boards where HDMI encoding moved to FPGA.

== Graphics ==

; TinyVicky
: Graphics subsystem in first-gen F256 models (F256Jr, F256K).

; TinyVicky II
: Enhanced graphics subsystem in F256Jr2.

; Vicky "The Fourth"
: Advanced graphics subsystem in F256K2.

; VICKY
: General name for the Foenix graphics/video controller family.

; Bitmap
: Graphics layer displaying pixel-mapped images directly from SRAM. Up to 3 bitmap layers available.

; Tilemap
: Graphics layer displaying tiles from tilesets for efficient scrolling graphics. Up to 3 tilemap layers available.

; Tileset
: Collection of tile graphics (8×8 or 16×16 pixels) referenced by tilemaps. Up to 8 tilesets supported.

; Sprite
: Hardware-accelerated moveable graphic object. Sizes: 8×8, 16×16, 24×24, or 32×32 pixels. 64 sprites standard, 128 with Core2x.

; CLUT
: Color Look-Up Table; palette mapping 8-bit index values to BGR colors. 4 graphics CLUTs available.

; Gamma Correction
: Color brightness adjustment via lookup tables at $C000-$C8FF in IO Page 0.

; DMA
: Direct Memory Access; hardware-accelerated memory copying that runs during VBlank at 100MHz.

; Layer
: Graphics compositing priority. Bitmaps and tilemaps can be assigned to layers 0-2.

== Memory ==

; SRAM
: Static RAM; main system memory. 512KB on gen1 models, 2MB on gen2 models.

; DDR3 DRAM
: 128MB dynamic RAM on F256K2 (support planned but not yet implemented).

; Flash
: 512KB non-volatile memory storing [[Firmware]] and programs. Each K2 core context has its own 512KB flash area.

; MMU
: Memory Management Unit; maps 8KB blocks of physical memory into the CPU's 64KB address space. See [[Memory_Management]].

; MLUT
: Memory Lookup Table; one of four MMU configurations (MLUT 0-3) for quick switching between memory mapping states.

; Slot
: One of eight 8KB regions in the CPU's 64KB address space:
:* Slot 0: $0000-$1FFF
:* Slot 1: $2000-$3FFF
:* Slot 2: $4000-$5FFF
:* Slot 3: $6000-$7FFF
:* Slot 4: $8000-$9FFF
:* Slot 5: $A000-$BFFF
:* Slot 6: $C000-$DFFF (IO Pages overlay this)
:* Slot 7: $E000-$FFFF

; Block
: 8KB chunk of physical memory that can be mapped into a slot via the MMU.

; IO Page
: Memory-mapped I/O region at $C000-$DFFF. Six pages available (0-5). See [[IO_Pages]].

; Expansion Port
: Slot for 256KB RAM or Flash expansion cartridge. Uses PCI-Express x1 socket form factor.

; Flat Memory
: Direct 24-bit addressing without MMU banking. Available in Core2x with SRAM_EN bit enabled.

; Zero Page / Direct Page
: First 256 bytes of memory used for fast addressing. Moveable anywhere in first 64KB in 65816 native mode.

== Audio ==

; SID
: Sound Interface Device; Commodore 64's famous sound chip. FPGA emulated on gen2; real chip sockets available on F256Jr.

; PSG
: Programmable Sound Generator; AY-3-8910-style chip (FPGA emulated). Directly accessible at $D600. See [[Use_the_PSG]].

; OPL3 (YMF262)
: Yamaha FM synthesis chip. Real chip on F256K; FPGA emulated on other models. See [[Use_the_OPL3_YMF262]].

; CODEC
: Audio codec chip for digital audio output. See [[Use_the_CODEC]].

; SAM2695
: Dream MIDI wavetable synthesis chip (gen2 only). See [[Use_the_Sam2695_Dream_MIDI_chip]].

; VS1053b
: VLSI audio decoder/encoder chip supporting MP3, AAC, Ogg Vorbis, and more (gen2 only). See [[Use_the_VS1053b_chip]].

; MIDI
: Musical Instrument Digital Interface; supported via SAM2695 and hardware MIDI in/out ports on gen2 models.

== Input/Output ==

; PS/2
: Keyboard/mouse interface standard. Single port supports both keyboard and mouse. See [[Use_the_PS/2_Mouse]].

; IEC
: Commodore serial bus for connecting disk drives, printers, and other peripherals.

; VIA
: Versatile Interface Adapter (WDC 65C22). VIA0 handles Atari joysticks; VIA1 handles keyboard matrix on F256K series.

; UART
: Universal Asynchronous Receiver-Transmitter; serial communication interface at $D630.

; RTC
: Real-Time Clock; battery-backed timekeeping chip at $D690.

; SD Card
: Storage medium for programs and data. Gen1 has one slot; gen2 has internal and external slots.

; DVI
: Digital Visual Interface; video output on first-gen models (supports both digital and analog signals).

; HDMI
: High-Definition Multimedia Interface; video output using digital TMDS signaling.

; ESP32 Feather
: WiFi module for first-gen models (internal installation).

; Wiznet
: Ethernet/WiFi module for second-gen models with external antenna connector. See [[Wiznet]].

; NES/SNES Controllers
: Supported game controllers via dedicated pin header or Mini-DIN9 connector. See [[Use_the_SNES/NES_controllers]].

== Software & Firmware ==

; MicroKernel
: Primary event-based, near real-time kernel for F256 (developed by Gadget). Supports 65c02 and 65816 in emulation mode. See [[Kernels]].

; OpenFNXKernal
: Community-developed CBM-style kernal alternative with SD Card I/O support. See [[Kernels]].

; SuperBASIC
: BBC BASIC-inspired interpreter; default F256 programming environment. See [[SuperBASIC]].

; DOS
: Minimalistic file management and information shell stored in flash.

; F/Manager (fm)
: Feature-rich file manager, program launcher, and memory exploration software. See [[Firmware]].

; Moreorless (mless)
: Built-in text editor stored in flash. See [[Moreorless]].

; FoenixMgr
: Python scripts for uploading code, flashing firmware, and managing the F256 from a PC or Mac.

; xdev
: Development trampoline firmware component that reacts to FoenixMgr commands (pcopy, runpgz, runpgx).

; CartFlasher (fcart)
: Utility for programming the 256KB Flash Cartridge with 8KB prepared blocks.

; pexec
: Kernel routine for loading and executing PGX/PGZ format programs.

== File Formats ==

; KUP
: Kernel User Program; simple executable format for flash-resident or disk-loaded programs. Header contains signature ($F256), size, slot, and entry point. See [[File_Formats]].

; PGX
: Single-segment executable with 8-byte header. Similar to MS-DOS COM or Commodore PRG format. See [[File_Formats]].

; PGZ
: Multi-segment executable format; can load code/data to multiple memory locations. Supports both 24-bit ('Z') and 32-bit ('z') addressing. See [[File_Formats]].

; Binary
: Raw memory image requiring known load address and boot-to-RAM mode. Development use only.

; .bin
: FPGA core file extension used on F256K2's FPGA load SD card.

; .uf2
: RP2040 firmware file format for second-gen models.

== Technical Terms ==

; IRQ
: Interrupt Request; hardware signal for event-driven programming. See [[IRQ]] and [[IRQ_Programming]].

; NMI
: Non-Maskable Interrupt; cannot be disabled by software.

; SOF
: Start of Frame interrupt; triggered at beginning of VSYNC.

; SOL
: Start of Line interrupt; triggered at configurable scanline.

; VBlank
: Vertical blanking interval; period between video frames when DMA runs.

; PHI2
: CPU clock signal phase 2; active high when CPU is accessing the bus.

; R/W
: Read/Write signal line (Read = high, Write = low).

; BGR / BGRx
: Color format: Blue, Green, Red byte order. BGRx adds unused padding byte for 4-byte alignment.

; Little Endian
: Byte ordering with least significant byte at lowest address. Used throughout the F256.

; BCD
: Binary-Coded Decimal; number encoding where each nibble represents a decimal digit (0-9). Used in RTC.

== DIP Switch Settings ==

DIP switches configure boot behavior and hardware options. See [[DIP_switches]].

; Boot-from-RAM
: When enabled, kernel searches first 48KB of RAM for programs before checking flash.

; Gamma Enable
: Enables color gamma correction.

; Core Select (K2)
: Two switches select which FPGA context (1-4) to load on F256K2.

== Key Register Addresses ==

; $0000 (MMU_MEM_CTRL)
: MMU Memory Control Register; selects active MLUT and enables editing.

; $0001 (MMU_IO_CTRL)
: MMU I/O Control Register; selects IO page and controls memory mapping flags.

; $D000 (MSTR_CTRL)
: VICKY Master Control Register; enables text, graphics, sprites, tiles, bitmaps.

; $D660 (INT_PENDING)
: Interrupt Pending flags (24-bit).

; $D66C (INT_MASK)
: Interrupt Mask register (24-bit).

; $D6A0 (SYS0)
: System Control Register; controls LEDs, reset, and reads SD card status.

== Development Tools ==

; Calypsi
: C compiler supporting 6502, 65816, and 6809 for F256 development.

; 64tass
: Popular cross-assembler for 6502/65816.

; cc65
: C compiler and toolchain for 6502.

; Quartus Prime Lite
: Intel FPGA programming software. Version 18.1 required for Cyclone IV on gen1 models.

; openFPGALoader
: Open-source FPGA programming tool for Linux and macOS.

== See Also ==

* [[Hardware]]
* [[Memory_Management]]
* [[IO_Pages]]
* [[Firmware]]
* [[SuperBASIC]]
* [[FPGA_Releases]]
* [[Getting_Started]]

[[Category:Reference]]
[[Category:Documentation]]