Use the Core2x - Revision history

1BitFeverDreams: /* Floating point module = */

2026-04-30T13:16:55Z

Floating point module =

← Older revision		Revision as of 09:16, 30 April 2026
Line 58:		Line 58:
	To do.		To do.

	=== Floating point module ====		=== Floating point module===

	To do.		To do.

1BitFeverDreams: /* New Features Documentation for the Core2x for K2 and Jr2 */

2026-04-30T13:16:24Z

New Features Documentation for the Core2x for K2 and Jr2

← Older revision		Revision as of 09:16, 30 April 2026
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	== ~~New Features Documentation for the~~ Core2x for K2 and Jr2 ==		== Core2x for K2 and Jr2 ==

	=== Overview ===		=== Overview ===

1BitFeverDreams: /* Accessing an extra bank of 64 sprites */

2026-04-30T13:15:48Z

Accessing an extra bank of 64 sprites

← Older revision		Revision as of 09:15, 30 April 2026
Line 24:		Line 24:
	Keep it cleared when you want to access the first bank.		Keep it cleared when you want to access the first bank.

	The sprite registers are well documented in this [[IO Pages\|Sprite section of the IO Pages]], as well as in chapter 5 of the [[Manuals\|Jr reference book]] starting at 0xD900, assuming you have i/o page set at 0.		The sprite registers are well documented in this [[IO Pages#$D900: Sprites\|Sprite section of the IO Pages]], as well as in chapter 5 of the [[Manuals\|Jr reference book]] starting at 0xD900, assuming you have i/o page set at 0.
	{\| class="wikitable"		{\| class="wikitable"
	\|+I/O Memory Control Register (0x0001)		\|+I/O Memory Control Register (0x0001)

1BitFeverDreams: /* Accessing an extra bank of 64 sprites */

2026-04-30T13:15:26Z

Accessing an extra bank of 64 sprites

← Older revision		Revision as of 09:15, 30 April 2026
Line 24:		Line 24:
	Keep it cleared when you want to access the first bank.		Keep it cleared when you want to access the first bank.

	The sprite registers are well documented in chapter 5 of the [[Manuals\|Jr reference book]] starting at 0xD900, assuming you have i/o page set at 0.		The sprite registers are well documented in this [[IO Pages\|Sprite section of the IO Pages]], as well as in chapter 5 of the [[Manuals\|Jr reference book]] starting at 0xD900, assuming you have i/o page set at 0.
	{\| class="wikitable"		{\| class="wikitable"
	\|+I/O Memory Control Register (0x0001)		\|+I/O Memory Control Register (0x0001)

1BitFeverDreams: /* Accessing an extra bank of 64 sprites */

2026-04-30T13:06:26Z

Accessing an extra bank of 64 sprites

← Older revision		Revision as of 09:06, 30 April 2026
Line 24:		Line 24:
	Keep it cleared when you want to access the first bank.		Keep it cleared when you want to access the first bank.

	The sprite registers are well documented in chapter 5 of the [[Manuals\|Jr reference book]] ~~at start~~ at 0xD900, assuming you have i/o page set at 0.		The sprite registers are well documented in chapter 5 of the [[Manuals\|Jr reference book]] starting at 0xD900, assuming you have i/o page set at 0.
	{\| class="wikitable"		{\| class="wikitable"
	\|+I/O Memory Control Register (0x0001)		\|+I/O Memory Control Register (0x0001)

1BitFeverDreams: /* Accessing an extra bank of 64 sprites */

2026-04-30T13:05:06Z

Accessing an extra bank of 64 sprites

← Older revision		Revision as of 09:05, 30 April 2026
Line 25:		Line 25:

	The sprite registers are well documented in chapter 5 of the [[Manuals\|Jr reference book]] at start at 0xD900, assuming you have i/o page set at 0.		The sprite registers are well documented in chapter 5 of the [[Manuals\|Jr reference book]] at start at 0xD900, assuming you have i/o page set at 0.

	~~I/O Memory Control Register (0x0001)~~
	{\| class="wikitable"		{\| class="wikitable"
	\|+		\|+I/O Memory Control Register (0x0001)
	!B7		!B7
	!B6		!''<u>B6</u>''
	!B5		!B5
	!B4		!B4
Line 39:		Line 37:
	\|-		\|-
	\|Not used		\|Not used
	\|Sprite Block Select - 0:Sprite 0-63, 1:Sprite 64-127		\|'''''<u>Sprite Block Select - 0:Sprite 0-63, 1:Sprite 64-127</u>'''''
	\|Move Flash/Cart to High		\|Move Flash/Cart to High
	\|Move IO Devices to High		\|Move IO Devices to High

1BitFeverDreams: sections laid out for the 2x core page

2026-04-30T13:04:07Z

sections laid out for the 2x core page

@@ Line 1: / Line 1: @@
-New Features Documentation for the Core2x for K2 and Jr2
+== New Features Documentation for the Core2x for K2 and Jr2 ==
 [https://256-foenix.us-east-1.linodeobjects.com/F256K2x_Cores%2FCore2x_ShortFormSpec_Aug7th.pdf Core2x_ShortForm_Documentation]
-Stefany Allaire's video on the Core2x features:
+Here is Stefany Allaire's video on the Core2x features: https://www.youtube.com/watch?v=ECu1Z3AwZEw
-https://www.youtube.com/watch?v=ECu1Z3AwZEw
+To do.

Minstrel Dragon: Added link to Core2X introduction video

2025-12-27T08:26:22Z

Added link to Core2X introduction video

← Older revision		Revision as of 04:26, 27 December 2025
Line 2:		Line 2:

	[https://256-foenix.us-east-1.linodeobjects.com/F256K2x_Cores%2FCore2x_ShortFormSpec_Aug7th.pdf Core2x_ShortForm_Documentation]		[https://256-foenix.us-east-1.linodeobjects.com/F256K2x_Cores%2FCore2x_ShortFormSpec_Aug7th.pdf Core2x_ShortForm_Documentation]

			Stefany Allaire's video on the Core2x features:

			https://www.youtube.com/watch?v=ECu1Z3AwZEw

Foenix: Put in place link to a Linode Bucket to download the PDF File

2025-08-07T20:10:28Z

Put in place link to a Linode Bucket to download the PDF File

← Older revision		Revision as of 16:10, 7 August 2025
Line 1:		Line 1:
	New Features Documentation for the Core2x for K2 and Jr2		New Features Documentation for the Core2x for K2 and Jr2

	~~CPU @ 12Mhz~~		[https://256-foenix.us-east-1.linodeobjects.com/F256K2x_Cores%2FCore2x_ShortFormSpec_Aug7th.pdf Core2x_ShortForm_Documentation]

	~~SRAM Bus @ 16bits Wide~~


	~~Bit Definition $0000~~

	~~Bit Definition $0001~~


	~~Memory Text Mode~~

	~~Line Drawing~~

	~~DMA Modes~~

	~~Floating~~-~~Point Module~~

	~~Sprites Expansion~~

Foenix: Introduction to the new page describing the feature of the Core2x for K2 and Jr2

2025-07-12T08:37:25Z

Introduction to the new page describing the feature of the Core2x for K2 and Jr2

New page

New Features Documentation for the Core2x for K2 and Jr2

CPU @ 12Mhz

SRAM Bus @ 16bits Wide

Bit Definition $0000

Bit Definition $0001

Memory Text Mode

Line Drawing

DMA Modes

Floating-Point Module

Sprites Expansion