Use the Core2x: Difference between revisions

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New Features Documentation for the Core2x for K2 and Jr2
== New Features Documentation for the Core2x for K2 and Jr2 ==


=== Overview ===
These new features were brought in as a new FPGA core back in August of 2025. It was feature complete for the K2 and mostly feature complete for the Jr2. Since early 2026, feature parity is coming to the Jr2.
Here is the original reference document from August 2025 from Stefany Allaire:
[https://256-foenix.us-east-1.linodeobjects.com/F256K2x_Cores%2FCore2x_ShortFormSpec_Aug7th.pdf Core2x_ShortForm_Documentation]
[https://256-foenix.us-east-1.linodeobjects.com/F256K2x_Cores%2FCore2x_ShortFormSpec_Aug7th.pdf Core2x_ShortForm_Documentation]


Stefany Allaire's video on the Core2x features:
Here is Stefany Allaire's video on the Core2x features: https://www.youtube.com/watch?v=ECu1Z3AwZEw
 
=== Flat mode 24 bit memory addressing and accessing 3 new banks of 512kb of SRAM ===
 
To do.
 
=== Moving I/O decoding and Flash/Cart to higher memory ===
 
To do.
 
=== Accessing an extra bank of 64 sprites ===
 
To access the extra bank of 64 sprites using the same register locations as the first 64 sprites, just set bit 6 to 1 of register 0x0001.
 
Keep it cleared when you want to access the first bank.
 
The sprite registers are well documented in chapter 5 of the [[Manuals|Jr reference book]] at start at 0xD900, assuming you have i/o page set at 0.
 
I/O Memory Control Register (0x0001)
{| class="wikitable"
|+
!B7
!B6
!B5
!B4
!B3
!B2
!B1
!B0
|-
|Not used
|Sprite Block Select - 0:Sprite 0-63, 1:Sprite 64-127
|Move Flash/Cart to High
|Move IO Devices to High
|Active IO Page[2]
|IO Page Disable - 0:Enabled, 1:Disabled
|Active IO Page[1]
|Active IO Page[0]
|}
 
=== New layer: memtext mode (more colors, fonts, background and foreground bigger LUTs) ===
 
To do.
 
=== VDMA Controller adds 16bit memcopy ===
 
To do.
 
=== Fast hardware line draw ===
 
To do.
 
=== Floating point module ====


https://www.youtube.com/watch?v=ECu1Z3AwZEw
To do.

Revision as of 09:04, 30 April 2026

New Features Documentation for the Core2x for K2 and Jr2

Overview

These new features were brought in as a new FPGA core back in August of 2025. It was feature complete for the K2 and mostly feature complete for the Jr2. Since early 2026, feature parity is coming to the Jr2.

Here is the original reference document from August 2025 from Stefany Allaire: Core2x_ShortForm_Documentation

Here is Stefany Allaire's video on the Core2x features: https://www.youtube.com/watch?v=ECu1Z3AwZEw

Flat mode 24 bit memory addressing and accessing 3 new banks of 512kb of SRAM

To do.

Moving I/O decoding and Flash/Cart to higher memory

To do.

Accessing an extra bank of 64 sprites

To access the extra bank of 64 sprites using the same register locations as the first 64 sprites, just set bit 6 to 1 of register 0x0001.

Keep it cleared when you want to access the first bank.

The sprite registers are well documented in chapter 5 of the Jr reference book at start at 0xD900, assuming you have i/o page set at 0.

I/O Memory Control Register (0x0001)

B7 B6 B5 B4 B3 B2 B1 B0
Not used Sprite Block Select - 0:Sprite 0-63, 1:Sprite 64-127 Move Flash/Cart to High Move IO Devices to High Active IO Page[2] IO Page Disable - 0:Enabled, 1:Disabled Active IO Page[1] Active IO Page[0]

New layer: memtext mode (more colors, fonts, background and foreground bigger LUTs)

To do.

VDMA Controller adds 16bit memcopy

To do.

Fast hardware line draw

To do.

Floating point module =

To do.